1. Field of the Invention
The present invention relates to a semiconductor integrated circuit including a power controllable region. More particularly, the present invention relates to a semiconductor integrated circuit including a region whose power supply can be controlled to be on/off, into which a test circuit is incorporated, and to a method of designing the semiconductor integrated circuit.
2. Description of the Related Art
In recent years, lower power consumption of electronic devices has been strongly demanded, and therefore the use of a semiconductor integrated circuit having a power supply control function is being advanced.
FIG. 14 is a layout diagram illustrating a semiconductor integrated circuit including a power controllable region.
In a semiconductor integrated circuit 10, there are wired a power supply VDD serving as a PAD supply power, and a grounded power supply GND serving as a PAD supply GND.
Then, the semiconductor integrated circuit 10 includes an always-on region 11 whose power supply is normally on, and a power controllable region 12 whose power supply can be controlled to be on/off by power supply control.
A power supply VSD is wired into the power controllable region 12 as a power supply, and the power controllable region 12 operates due to the power supply from the power supply VSD.
Power control switches 13A and 13B are disposed between the power supply VDD and the power supply VSD, and the power control switches 13A and 13B are controlled in on/off operation according to a power control signal CTL input from the outside of the power controllable region 12.
FIG. 15 is a circuit diagram of the power supply control.
A plurality of semiconductor switches 14 (PMOS transistors in this example) are disposed between the power supply VDD and the power supply VSD, and a control signal line 16 is wired so that the power control signal CTL is supplied to a gate of each semiconductor switch 14.
Further, a timing adjustment buffer 15 is inserted between the respective semiconductor switches 14.
In the above-mentioned configuration, the power control switches 13A and 13B are controlled in on/off operation according to the power control signal CTL, to thereby control voltage of the power supply VSD. As a result, an appropriate voltage is applied to the power supply VSD in response to operation level of a logic circuit 18 in the power controllable region 12, and also the power supply to the power supply VSD stops when the power controllable region 12 is at rest.
As a result, leak current from the power supply VDD to the grounded power supply GND is prevented, and the lower power consumption can be realized.
A large scale integrated circuit (LSI) having a power control function and a power-off function is disclosed in JP 2006-170663 A.
The conventional power controllable region is small in area, and hence the number of semiconductor switches that constitute the power control switch may be extremely small (for example, one or two).
On the contrary, in recent years, because the power controllable region becomes large, and the operation thereof becomes complicated, the configuration of the power control switch requires a larger number of semiconductor switches.
However, an increase in the number of semiconductor switches that constitute the power control switch leads to the following problems.
For example, as illustrated in FIG. 16, when the control signal line 16 is disconnected on the way, a potential of the control signal line at the disconnected portion becomes unfixed. There may occur a defect that the semiconductor switch 14 is fixed to an always-off state due to the unfixed potential.
In this case, the semiconductor switches 14 that normally operate are only ones disposed on the left of FIG. 1, and no voltage necessary for the power supply VSD is applied.
Then, when the power controllable region 12 operates, an IR drop occurs to drop a potential of the power supply VSD.
In this case, because the always-off switch exists, the degree of voltage drop (IR drop) between the power supply lines VDD and VSD becomes large as compared with a case in which the respective switches normally operate. For that reason, a value of the voltage that is applied to the logic circuit 18 may not be a sufficient value. This leads to such problems that the logic circuit 18 malfunctions and the logic circuit 18 does not operate at a prescribed operating frequency.
Alternatively, as illustrated in FIG. 17, when the control signal line 16 is disconnected on the way, and a potential of the disconnected portion becomes unfixed, there may occur a defect that the semiconductor switch 14 is fixed to an always-on state.
In this case, even if a predetermined number or all of power control switches 13A and 13B are turned off to suppress leak current when the logic circuit 18 of the power controllable region 12 stops its operation, a current is allowed to flow from the broken always-on switch. As a result, an original objective in introducing the power control switches 13A and 13B cannot be achieved.
Further, as the number of semiconductor switches 14 constituting the power control switches 13A and 13B is larger, the number of always-on switches caused by disconnection, or the number of always-off switches caused by disconnection becomes larger. As a result, the degree of IR drop and the amount of leak current more increase.
Up to now, even if a failure occurs in the control signal line for controlling the power control switches 13A and 13B, it is very difficult to specify its cause.
For example, in the case of FIG. 16, when the malfunction of the power controllable region 12 or a slowing down of the operating frequency occurs due to the IR drop, an error is detected.
However, it is difficult to concretely identify, as its cause, whether the control signal line 16 is disconnected, the logic per se of the power control signal CTL is in error, or the transistor 14 of the power controllable region 12 is defective.
Further, in the case of FIG. 17, the presence of leak current is detected, but it is difficult to concretely identify whether the leak current is generated in the always-on region 11, or the leak current is generated in the power controllable region 12 due to the disconnection of the control signal line 16.
Accordingly, the conventional art suffers from a problem to be solved that it is impossible to specify that the malfunction of the circuit, an increase in the leak current, or the like occurs due to the disconnection of the control signal line 16.